Implantable cardiac defibrillators (ICDs) are highly sophisticated medical devices which are surgically implanted (abdominally or pectorally) in a patient to monitor the performance of the patient's heart, and to deliver electrical shocks to the patient's heart as required to correct cardiac arrhythmias which occur due to disturbances in the normal pattern of electrical conduction within the heart muscle. Cardiac arrhythmias can be thought of as disturbances of the normal rhythm of the heart beat. ICDs monitor the performance of the patient's heart by analyzing electrical signals generated by one or more sensing electrodes which are typically positioned in the right ventricular apex of the patient's heart.
In this regard, an ICD continuously monitors the heart activity of the patient in whom the device is implanted, and delivers the appropriate electrical shocks to the heart on an intermittent basis, as required, to correct detected arrhythmias, ideally before they develop into a full-blown episode of ventricular fibrillation. The waveforms and timing of these corrective (defibrillating) signals must be precisely controlled in order for the ICD to properly perform its life-saving functions (e.g., pacemaking and defibrillation). Thus, it can be appreciated that the resolution and accuracy of the timing circuits employed in ICDs is critical to the safety and reliability thereof, and thus, to the life of the patients in whom these devices are implanted. In this connection, the output frequency of the crystal oscillators utilized in ICDs must be maintained within a very narrow operating range in order to prevent device malfunction, which can have catastrophic consequences.
In this connection, presently available ICDs incorporate circuitry to detect a failure mode of a crystal oscillator in which the output frequency falls below a prescribed minimum output frequency, and to switch to a back-up clock signal generator when such a failure mode is detected. This failure mode is sometimes referred to as "underspeed" failure. However, this underspeed detection circuitry is prone to making false or erroneous detections of underspeed failure. In addition to this significant drawback, such circuitry is incapable of detecting a failure mode in which the output frequency of the crystal oscillator exceeds a prescribed maximum output frequency. This failure mode is sometimes referred to as an "overspeed" failure. This constitutes a significant shortcoming of the presently available technology.
Based on the above and foregoing, it can be appreciated that there presently exists a need in the art for a crystal oscillator back-up circuit which overcomes the above-described drawbacks and shortcomings of the presently available technology. The present invention fulfills this need.